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  Datasheet File OCR Text:
  C-MOS SCSI2 PROTOCOL-CONTROLLER
-TOP VIEW
MB86603PFV(1/4) IL16
132 130
NC NC 120 GND NC NC NC NC GND VDD (+5V) 110 NC NC NC GND NC 100 NC GND NC GND (OPEN) (OPEN) 90 89 VDD (+5V) NC GND NC NC NC 20 VDD (+5V) GND NC NC
NC NC GND
140
VDD (+5V)
133 GND
NC
88
GND VDD (+5V)
NC VDD (+5V) GND VDD (+5V)
80
150 GND VDD (+5V) NC
160 NC
GND NC 170 VDD (+5V) NC
1 NC
176
w
w
w
t a .D
10
S a
GND NC GND NC
NC NC 30 GND NC
NC GND NC
e h
U t4 e
.c
m o
70 60 50
GND
VDD (+5V) GND NC
GND
45
40
44
w
w
w
.D
ta a
he S
t4 e
U
om .c
MB86603PFV(2/4) VDD=(+5V)
PIN
No. I/O 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 O O O I/O
SIGNAL NC DBOE6 DBOE5 Vss DBOE4 NC LDBP Vss NC DB7 DB6 NC DB5 Vss NC DB4 NC DB3 NC DB2 VDD Vss NC NC DB1 DB0 NC UDBP NC Vss NC DB15 DB14 NC DB13 Vss NC DB12 DBOE3 DBOE2 DBOE1 DBOE0 UDBOEP VDD
PIN
No. I/O 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 O O O I I I
SIGNAL Vss DBOE15 DBOE14 DBOE13
PIN
No. I/O
SIGNAL OPEN OPEN Vss DBOE8 INIT TARG NC TEST2 Vss NC DB11 DB10 NC DB9 Vss NC DB8 NC I/O NC REQ VDD Vss NC C/D NC SEL NC MSG NC Vss NC RST NC ACK BSY Vss NC ATN NC SELOE RSTOE BSYOE VDD
PIN
No. I/O I I I I I I I I/O I/O I/O I/O I/O I/O I/O I/O I/O
SIGNAL Vss A0 A1 A2 A3 A4 CS0 CS1 LDP Vss D0 VDD D1 D2 D3 D4 D5 D6 D7 Vss VDD NC D8 D9 D10 D11 D12 NC D13 D14 D15 UDP Vss NC BHE WR (LDS) VDD RD (R/W) INT (INT) MODE RESET LDBOEP DBOE7 NC
I/O I/O I/O
I/O I/O I/O
I/O I/O I/O
I/O I/O I/O
I/O O O O O O
89 90 91 92 93 S/DSEL IORD (DMR/W) 94 IOWR (DMLDS) 95 NC 96 I DMA0 97 I/O LDMDP 98 Vss 99 I/O DMD0 100 I/O DMD1 101 VDD 102 I/O DMD2 103 I/O DMD3 104 I/O DMD4 105 I/O DMD5 106 I/O DMD6 107 I/O DMD7 108 Vss 109 I/O 110 DMD8 I/O 111 DMD9 I/O 112 DMD10 I/O 113 DMD11 I/O 114 DMD12 115 VDD I/O 116 DMD13 I/O 117 DMD14 I/O 118 DMD15 119 Vss I/O 120 UDMDP 121 VDD I 122 CLK I DMBHE (DMUDS) 123 124 NC 125 I DACK 126 O DREQ 127 I TP 128 O DBOE12 129 O DBOE11 130 O DBOE10 131 O DBOE9 132 NC
O O O I
I/O I/O I/O
I/O I/O I/O
I/O I/O I/O
I/O I/O I/O
I/O O O O
133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176
I/O I/O I/O I/O I/O I/O I/O I/O I/O
I I I O I I/O O O
MB86603PFV(3/4)
INPUT
A0-A4 BHE (UDS) CLK CS0,CS1 DACK DMA0 DMBHE (DMUDS) IORD (DMR/W) IOWR (DMLDS) MODE RD (R/W) S/DSEL TP TEST2 WR (LDS) ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ADDRESS 0-4 BUS HIGH ENABLE (UPPER DATA STROBE) CLOCK CHIP SELECT 0,1 DMA ACKNOWLEDGE DMA ADDRESS 0 DMA BUS HIGH ENABLE (DMA UPPER DATA STROBE) I/O READ (DMA READ/WRITE) I/O WRITE (DMA LOWER DATA STROBE) MODE READ (READ/WRITE) SINGLE-END DIFFERENTIAL SELECT TRANSFER PERMISSION TEST WRITE (LOWER DATA STROBE) BUSY OUTPUT ENABLE DATA BUS0-7 ENABLE DATA BUS8-15 ENABLE DMA REQUEST INITIATOR INTERRUPT REQUEST LOWER DATA BUS OUTPUT ENABLE PARITY RESET OUTPUT ENABLE SELECT OUTPUT ENABLE TARGET UPPER DATA BUS OUTPUT ENABLE PARITY ACKNOWLEDGE ATTENTION BUSY CONTROL/DATA DATA 0-7 DATA 8-15 DATA BUS0-7 DATA BUS 8-15 DMA DATA 0-7 DMA DATA 8-15 INPUT/OUTPUT LOWER DATA PARITY LOWER DATA BUS PARITY LOWER DMA DATA PARITY MESSAGE REQUEST RESET RESET SELECT UPPER DATA PARITY UPPER DATA BUS PARITY
OUTPUT
BSYOE DBOE0-7 DBOE8-15 DREQ INIT INT (INT) LDBOEP RSTOE SELOE TARG UDBOEP
INPUT/OUTPUT
ACK ATN BSY C/D D0-D7 D8-15 DB0-7 DB8-15 DMD0-7 DMD8-15 I/O LDP LDBP LDMDP MSG REQ RESET RST SEL UDP UDBP UDMDP
; UPPER DMA DATA PARITY
MB86603PFV(4/4) MSG C/D I/O ATN SEL RST REQ ACK BSY 117 113 107 127 115 121 109 123 124 134-138 A4-0
VARIOUS
1
INTERNAL
5 PROCESSOR REGISTER
MPU INTERFACE
163-161,159-155,164 151-145,143,141 D15-8,UDP D7-0,LDP 171 168 170 139 140 167 172
SCSI INTERFACE
131 BSYOE 129 SELOE 93 INIT 94 TARG 130 RSTOE 32,33,35,38,99, 100,102,105,28 DB15-8 UDBP 10,11,13,16,18, 20,25,26,7 DB7-0 LDBP 46-48, 84-87,92,43 DBOE15-8 UDBOEP 175,2,3,5, 39-42,174 DBOE7-0 LDBOEP S/DSEL 49
2 TIMER
6
(32BYTE)
INT (INT) WR (LDS) RD (R/W) CS0 CS1 BHE MODE
RECIEVE MSG,CMD, STATUS BUFFER
3 PHASE CONTROLLER 7 (32BYTE)
4 TRANSFER CONTROLLER
SEND MSG,CMD, STATUS BUFFER
74-72,70-66, 64-59,57,56,54 8 (512BYTE)
DMA INTERFACE
DMD15-8,UDMDP DMD7-0,LDMDP 82 81 79 53 51 50 83
USER PROGRAM MEMORY
DREQ DACK DMBHE (DMUDS) DMA0 IOWR (DMLDS) IORD (DMR/W) TP
9 DATA REGISTER (64BYTE)


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